Highlights
- Led schematic capture and PCB layout for a 4-layer STM32F405 (ARM Cortex-M4) flight controller.
- Designed the power tree: 24 V LiPo → 5 V via LMR51450 synchronous buck converter → 3.3 V via LM3940 LDO.
- Implemented reverse-polarity protection with back-to-back AONR21357 P-channel MOSFETs, TVS protection, and TPS2113 USB/battery power multiplexing.
- Integrated an LSM6DSV 6-axis IMU, M24C64 EEPROM, and INA226 power monitor with a Kelvin-connected 2 mΩ shunt across three independent I²C buses.
- Routed 90 Ω differential-pair USB on a JLCPCB 4-layer stackup; completed polygon pours and silkscreen.
- Structured a multi-page hierarchical schematic with global net labels for parallel team development.
Overview
NYUDroneFC R1 is a quadcopter flight controller and educational development board designed for ECE-UY 4423: PCB Design for Embedded Systems at NYU Tandon School of Engineering. The board was developed by a three-person team (Rosario Campos, Asfaq Fahim, Soyeon Park). As project lead, I directed the schematic architecture, power design, component integration, PCB layout, and routing in Altium Designer, targeting a 4-layer JLCPCB stackup. The schematic spans six sheets.
The design combines a high-current battery input, switching and linear regulation, precision current sensing, inertial sensing, and high-speed USB on a single compact board, which makes power integrity, component placement, and signal routing the primary engineering constraints. The board provides four motor power outputs (J8–J11), four PWM headers, a radio header, SWD, and USB-C.
Specifications
| Microcontroller | STM32F405RGT7 (ARM Cortex-M4, LQFP64) |
|---|---|
| PCB | 4-layer, JLCPCB stackup · Rev R1 |
| Input power | 24 V LiPo via XT30 connector, or 5 V USB-C |
| 5 V rail | LMR51450 synchronous buck converter |
| 3.3 V rail | LM3940 3.3 V low-dropout regulator (LDO) |
| Power path | TPS2113 automatic USB / battery power multiplexer |
| Protection | Back-to-back AONR21357 P-MOSFETs with BZT52C15S Zener gate clamp · TVS diode · USB ESD protection |
| Inertial sensing | LSM6DSV 6-axis IMU (accelerometer + gyroscope) |
| Non-volatile memory | M24C64 64-Kbit I²C EEPROM |
| Power monitoring | INA226 on the 24 V motor bus, Kelvin-connected 2 mΩ shunt |
| Communication | Three independent I²C buses |
| USB | USB-C, 90 Ω differential pair |
| Clock | External crystal oscillator (Y1) |
| Debug | SWD via 4-pin Molex connector (P1) |
| I/O | 4 motor outputs (J8–J11) · 4 PWM headers · radio header · reset & BOOT buttons · status LED |
Power architecture
The power tree was designed first, as every downstream subsystem depends on it.
- Input protection. The XT30 battery input passes through back-to-back AONR21357 P-channel MOSFETs with a BZT52C15S Zener clamping the gate voltage, providing reverse-polarity protection. A TVS diode and bulk capacitance follow on the 24 V rail.
- 24 V → 5 V: LMR51450 synchronous buck converter. Switching regulation for the large step-down from battery voltage, with a 5.6 µH inductor and a 100 kΩ / 19.1 kΩ feedback divider setting the output.
- 5 V → 3.3 V: LM3940 LDO. Linear post-regulation provides a low-noise 3V3_MCU rail for the microcontroller and sensors.
- TPS2113 power multiplexer. Automatically selects between 5V_USB (bench operation) and 5V_Buck (battery operation) to produce 5V_System, without back-feeding either source.
Sensor and peripheral integration
- LSM6DSV IMU for attitude sensing (3-axis accelerometer and 3-axis gyroscope).
- M24C64 EEPROM for persistent configuration and calibration data.
- INA226 power monitor for battery current and power measurement.
Peripherals are distributed across three independent I²C buses with 2.2 kΩ pull-ups. The INA226 sits on the 24 V motor bus, measuring current through a 2 mΩ shunt resistor using Kelvin (4-wire) connections. The sense lines are routed directly from the shunt pads through series filter resistors, so trace resistance is excluded from the measurement.
Schematic architecture
The schematic is organized as a multi-page design (power, MCU, sensors, connectors) linked by global net labels, enabling team members to develop subsystems in parallel while keeping each sheet readable.
PCB layout and routing
- Component placement of regulators, MCU, IMU, and connectors prior to routing.
- Polygon pours with via stitching for ground and power distribution to provide low-impedance return paths.
- 90 Ω differential-pair routing for USB, with trace width and spacing matched to the manufacturer stackup.
- Signal routing for I²C, SWD debug, and power distribution.
- Silkscreen labeling of connectors and test points to support board bring-up and debugging.
The STM32 support circuitry (crystal oscillator, reset/boot, SWD, decoupling) is carried over from my STM32 development board, which served as the reference platform for this design.
Skills applied
- Power tree design: buck converter and LDO selection, power path management, input protection.
- Controlled-impedance differential-pair routing and stackup-aware layout.
- Precision current sensing with Kelvin shunt connections.
- Multi-page schematic organization for team-based hardware development.